Codasip, a leader in RISC-V Custom Compute, has recently announced the release of their new low-power embedded processor core, along with the next generation of their processor design automation toolset, Codasip Studio. The new Codasip L110 promises to deliver top-of-the-line performance for power-sensitive applications, while also allowing customers to easily add customizations for unprecedented application-specific PPA (Power, Performance, and Area) improvements.
According to Brett Cline, Chief Commercial Officer at Codasip, “Customization allows designers to introduce new instructions specific to their software workload and significantly improve PPA. Our new core offers best-in-class performance for small-area and low-power applications accompanied by new possibilities for easy and quick customization with no risk to the core functionality. We offer all this in a flexible business model that will not cost you an arm and a leg.”
The new Codasip L110 RISC-V CPU core is set to change the game with its up to 50% improvement in performance per watt and 20% smaller code size compared to similar cores in the market. The core boasts extensive configurability, allowing different area/performance trade-off levels, and support for standard RISC-V code-size extensions. It is also fully customizable, giving designers the ability to extend the processor and achieve massive PPA improvements to differentiate their products. Designed by the Codasip team using Codasip Studio Fusion, L110 is ideal for small-area, low-power applications, such as state machine replacements, sensor controllers, and IoT edge.
Codasip Studio Fusion introduces unique processor design and verification features with unparalleled productivity. The toolset generates both the RTL and the software development tools from a single processor model, but the new version, Codasip Studio Fusion, takes this capability a step further with the introduction of a segmentation layer. Customers can now configure the core from set options, create custom instructions within set bounds, or design freely. The tools automatically generate an SDK (Software Development Toolkit) including a compiler, simulation models, debugger, and profiler, and an HDK (Hardware Development Kit) including RTL (Register Transfer Level), a verification framework, and more.
The latest version also includes more design automation to make processor design even easier and faster. New design constructs allow for fusing the processor’s architectural and microarchitectural description, while the toolset can automatically convert declarative descriptions of common processor aspects into low-level logic.
The benefits of the Codasip Studio Fusion toolset are all reflected in the new L110 core, which can be used as a pre-verified starting point to achieve the right level of customization. For customers in need of a starting point with higher performance, Codasip offers other options such as the 64-bit RISC-V application core A730.
Codasip is a processor technology company that enables system-on-chip developers to differentiate their products for competitive advantage. They offer a unique approach to leveraging the transformational potential of the open RISC-V ISA, with their Custom Compute offering that includes Codasip Studio design automation tools and a fully open architecture licensing model, along with a range of customizable processor IP. Based in Europe, Codasip serves a global market where billions of devices are already enabled by their technology. To learn more, visit www.codasip.com.
Media Contact:
Tora Fridholm, Marketing Communications Manager
Email: tora.fridholm@codasip.com
Phone: +46 761 619134
